1. Field of the Invention
The present invention relates to a data processing system having a high speed buffer memory.
2. Description of the Prior Art
In order to process instruction words at higher speed, data processing systems usually employ a high speed, small capacity buffer memory (cache memory).
In a prior art data processing system, data is transferred from a main memory to the high speed buffer memory only when there is a demand for data for an arithmetic unit.
In such a data processing system, since the processing by the arithmetic unit must "wait" during the period of data transfer, the processing ability of the arithmetic unit is reduced.